Parallel Port (Printer) Interface Board

The LPTCTRL board is the LPTek interface to the PC's parallel port. Using the signals present at the three sequential addresses of the identified parallel port (either Hex 378, 379, 37A or 278, 279, 27A or 3BC, 3BD, 3BE), the board generates a bi-directional 8 bit data and an independent 8 bit address bus with appropriately timed Write, Read, and Chip Select signals. Standard parallel ports do not have a strobe signal that identifies the onset of read or write instructions, so these have traditionally been generated in software and are output over some of the control lines on the third address. This technique places overhead burdens on the CPU that slow down transactions through the parallel port. However, the throughput rate to the conventional parallel port in the LPTek system is in excess of 250K LPTek instructions/second and will depend, to some extent, on the host computer's CPU type and BIOS. Read and Write operations to the conventional parallel port are not particularly related to the CPU speed. (Interestingly, a typical Pentium 133 system may have a slower throughput to its parallel port than an older 386SX at 20MHz).
The LPTCTRL board provides properly timed negative going READ, WRITE, and CS (Chip Select) signals (see timing diagram) that are distributed via the bus to the various function boards in the LPTek suite of data acquisition components. The read and write signals are timed to occur safely within the CS interval thus assuring proper integrity of the data read from or written to the individual LPTek function boards. The data, address, and control lines can support up to 16 boards simultaneously. Additionally, a 6 MHz system clock is provided on the bus as well. The board also supports a printer pass through function that allows the user to leave a printer connected to the system. A flick of a switch returns the parallel port for printer service.
Additional features supported on the LPTCTRL board are the software enabled IRQ hardware interrupt and a DMA mode that permits control of the LPTek bus by an external processor. The following instructions are used by the LPTCTRL board and can be passed to virtually any bus oriented device available:
MAIN INSTRUCTION SET

• 0. Write Data to bus
  
• 1. Read Data from bus
  
• 2. Latch an address to a bus device

AUXILIARY INSTRUCTIONS

• 3. Start DMA procedure
  
• 4. End DMA procedure
  
• 5. Issue Reset Pulse

LPTek Corp., 1100 Shames Drive, Westbury, NY 11590-1746. Tel: 516-333-8820; Fax: 516-333-8814.